To meet growing terabit link rates, highly parallel and scalable architectures are needed for IP lookup engines in next generation routers. This paper proposes an SRAM-based multi...
In this paper, we present the power estimation methodologies for the development of a low-power security processor that contains significant amount of logic and memory. For the lo...
- The increasing complexity of SoCs makes networks on chip (NoC) a promising substitute for busses and dedicated wires interconnection schemes. However, new tools need to be develo...
Spatially distributed 3D circuit models are extracted with a segmentto-segment BEM (Boundary Element Method) algorithm for both capacitance and inverse inductance couplings rather...
Michael W. Beattie, Hui Zheng, Anirudh Devgan, Byr...
We have developed an educational software tool (Aprendiendo) to reinforce the learning process of children with special educational needs. This tool makes use of a variety of inte...