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POS
1998
Springer
15 years 11 months ago
Optimizing the Read and Write Barriers for Orthogonal Persistence
Persistent programming languages manage volatile memory as a cache for stable storage, imposing a read barrier on operations that access the cache, and a write barrier on updates ...
Antony L. Hosking, Nathaniel Nystrom, Quintin I. C...
SEAAI
1998
Springer
15 years 11 months ago
On theoretical backgrounds of CAD
Abstract. In the past, some information technologies (IT) have quickly been adopted by the engineering practice while the implementation of others has been slower. In the paper, th...
Ziga Turk
ITC
1997
IEEE
129views Hardware» more  ITC 1997»
15 years 11 months ago
On Using Machine Learning for Logic BIST
This paper presents a new approach for designing test sequences to be generated on–chip. The proposed technique is based on machine learning, and provides a way to generate effi...
Christophe Fagot, Patrick Girard, Christian Landra...
MICRO
1997
IEEE
139views Hardware» more  MICRO 1997»
15 years 11 months ago
The Filter Cache: An Energy Efficient Memory Structure
Most modern microprocessors employ one or two levels of on-chip caches in order to improve performance. These caches are typically implemented with static RAM cells and often occu...
Johnson Kin, Munish Gupta, William H. Mangione-Smi...
MICRO
1997
IEEE
82views Hardware» more  MICRO 1997»
15 years 11 months ago
Procedure Based Program Compression
Cost and power consumption are two of the most important design factors for many embedded systems, particularly consumer devices. Products such as Personal Digital Assistants, pag...
Darko Kirovski, Johnson Kin, William H. Mangione-S...
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