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IPPS
2000
IEEE
15 years 11 months ago
Design and Evaluation of I/O Strategies for Parallel Pipelined STAP Applications
This paper presents experimental results for a parallel pipeline STAP system with I/O task implementation using the parallel file systems on the Intel Paragon and the IBM SP. In ...
Wei-keng Liao, Alok N. Choudhary, Donald Weiner, P...
DAC
2006
ACM
16 years 7 months ago
Synthesis of synchronous elastic architectures
A simple protocol for latency-insensitive design is presented. The main features of the protocol are the efficient implementation of elastic communication channels and the automat...
Jordi Cortadella, Michael Kishinevsky, Bill Grundm...
VLSID
2006
IEEE
150views VLSI» more  VLSID 2006»
16 years 6 months ago
A Comprehensive SoC Design Methodology for Nanometer Design Challenges
SoC design methodologies are under constant revision due to adoption of fast shrinking process technologies at nanometer levels. Nanometer process geometries exhibit new complex d...
R. Raghavendra Kumar, Ricky Bedi, Ramadas Rajagopa...
GLVLSI
2005
IEEE
124views VLSI» more  GLVLSI 2005»
16 years 4 days ago
SOFTENIT: a methodology for boosting the software content of system-on-chip designs
Embedded software is a preferred choice for implementing system functionality in modern System-on-Chip (SoC) designs, due to the high flexibility, and lower engineering costs pro...
Abhishek Mitra, Marcello Lajolo, Kanishka Lahiri
SIGSOFT
2007
ACM
16 years 7 months ago
Beyond refactoring: a framework for modular maintenance of crosscutting design idioms
Despite the automated refactoring support provided by today's IDEs many program transformations that are easy to conceptualize-such as improving the implementation of a desig...
Macneil Shonle, William G. Griswold, Sorin Lerner