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» The design and implementation of AspectC
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ASPDAC
2007
ACM
133views Hardware» more  ASPDAC 2007»
15 years 10 months ago
RTOS and Codesign Toolkit for Multiprocessor Systems-on-Chip
Abstract-- Multiprocessor designs have become popular in embedded domains for achieving the power and performance requirements. In this paper, we present principles and techniques ...
Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada
DATE
2008
IEEE
115views Hardware» more  DATE 2008»
16 years 1 months ago
Synthesizing Synchronous Elastic Flow Networks
This paper describes an implementation language and synthesis system for automatically generating latency insensitive synchronous digital designs. These designs decouple behaviora...
Greg Hoover, Forrest Brewer
VLSISP
2011
358views Database» more  VLSISP 2011»
15 years 1 months ago
Accelerating Machine-Learning Algorithms on FPGAs using Pattern-Based Decomposition
Machine-learning algorithms are employed in a wide variety of applications to extract useful information from data sets, and many are known to suffer from superlinear increases in ...
Karthik Nagarajan, Brian Holland, Alan D. George, ...
DAC
2007
ACM
16 years 7 months ago
Synchronous Elastic Circuits with Early Evaluation and Token Counterflow
A protocol for latency-insensitive design with early evaluation is presented. The protocol is based on a symmetric view of the system in which tokens carrying information move in ...
Jordi Cortadella, Michael Kishinevsky
DAC
2011
ACM
14 years 6 months ago
AENEID: a generic lithography-friendly detailed router based on post-RET data learning and hotspot detection
In the era of deep sub-wavelength lithography for nanometer VLSI designs, manufacturability and yield issues are critical and need to be addressed during the key physical design i...
Duo Ding, Jhih-Rong Gao, Kun Yuan, David Z. Pan