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IPPS
2010
IEEE
15 years 4 months ago
Highly scalable parallel sorting
Sorting is a commonly used process with a wide breadth of applications in the high performance computing field. Early research in parallel processing has provided us with comprehen...
Edgar Solomonik, Laxmikant V. Kalé
ISAAC
2010
Springer
257views Algorithms» more  ISAAC 2010»
15 years 4 months ago
Approximating Minimum Bending Energy Path in a Simple Corridor
Abstract. In this paper, we consider the problem of computing a minimum bending energy path (or MinBEP) in a simple corridor. Given a simple 2D corridor C bounded by straight line ...
Jinhui Xu, Lei Xu, Yulai Xie
MICRO
2010
IEEE
242views Hardware» more  MICRO 2010»
15 years 4 months ago
ASF: AMD64 Extension for Lock-Free Data Structures and Transactional Memory
Advanced Synchronization Facility (ASF) is an AMD64 hardware extension for lock-free data structures and transactional memory. It provides a speculative region that atomically exec...
Jae-Woong Chung, Luke Yen, Stephan Diestelhorst, M...
MICRO
2010
IEEE
119views Hardware» more  MICRO 2010»
15 years 4 months ago
A Predictive Model for Dynamic Microarchitectural Adaptivity Control
Abstract--Adaptive microarchitectures are a promising solution for designing high-performance, power-efficient microprocessors. They offer the ability to tailor computational resou...
Christophe Dubach, Timothy M. Jones, Edwin V. Boni...
MICRO
2010
IEEE
132views Hardware» more  MICRO 2010»
15 years 4 months ago
Parichute: Generalized Turbocode-Based Error Correction for Near-Threshold Caches
Energy efficiency is a primary concern for microprocessor designers. A very effective approach to improving the energy efficiency of a chip is to lower its supply voltage to very ...
Timothy N. Miller, Renji Thomas, James Dinan, Bruc...
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