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HIPEAC
2011
Springer
14 years 5 months ago
NoC-aware cache design for multithreaded execution on tiled chip multiprocessors
In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...
Ahmed Abousamra, Alex K. Jones, Rami G. Melhem
CLUSTER
2008
IEEE
16 years 17 days ago
Live and incremental whole-system migration of virtual machines using block-bitmap
—In this paper, we describe a whole-system live migration scheme, which transfers the whole system run-time state, including CPU state, memory data, and local disk storage, of th...
Yingwei Luo, Binbin Zhang, Xiaolin Wang, Zhenlin W...
ICPP
1996
IEEE
15 years 10 months ago
Polynomial-Time Nested Loop Fusion with Full Parallelism
Data locality and synchronization overhead are two important factors that affect the performance of applications on multiprocessors. Loop fusion is an effective way for reducing s...
Edwin Hsing-Mean Sha, Chenhua Lang, Nelson L. Pass...
FOCM
2008
100views more  FOCM 2008»
15 years 6 months ago
Meshfree Thinning of 3D Point Clouds
An efficient data reduction scheme for the simplification of a surface given by a large set X of 3D point-samples is proposed. The data reduction relies on a recursive point remov...
Nira Dyn, Armin Iske, Holger Wendland
EWSN
2009
Springer
16 years 6 months ago
MVSink: Incrementally Building In-Network Aggregation Trees
Abstract. In-network data aggregation is widely recognized as an acceptable means to reduce the amount of transmitted data without adversely affecting the quality of the results. T...
Leonardo L. Fernandes, Amy L. Murphy