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ICCAD
2005
IEEE
127views Hardware» more  ICCAD 2005»
16 years 3 months ago
Flip-flop insertion with shifted-phase clocks for FPGA power reduction
— Although the LUT (look-up table) size of FPGAs has been optimized for general applications, complicated designs may contain a large number of cascaded LUTs between flip-flops...
Hyeonmin Lim, Kyungsoo Lee, Youngjin Cho, Naehyuck...
SASO
2009
IEEE
16 years 1 months ago
Self-organized Fault-tolerant Routing in Peer-to-Peer Overlays
—In sufficiently large heterogeneous overlays message loss and delays are likely to occur. This has a significant impact on overlay routing, especially on longer paths. The exi...
Wojciech Galuba, Karl Aberer, Zoran Despotovic, Wo...
MOBISEC
2009
Springer
16 years 1 months ago
Filtering SPAM in P2PSIP Communities with Web of Trust
Spam is a dominant problem on email systems today. One of the reasons is the lack of infrastructure for security and trust. As Voice over IP (VoIP) communication becomes increasing...
Juho Heikkilä, Andrei Gurtov
ISSTA
2009
ACM
16 years 1 months ago
Loop-extended symbolic execution on binary programs
Mixed concrete and symbolic execution is an important technique for finding and understanding software bugs, including securityrelevant ones. However, existing symbolic execution...
Prateek Saxena, Pongsin Poosankam, Stephen McCaman...
ICCCN
2008
IEEE
16 years 29 days ago
Logical Topology Design for IP-over-WDM Networks: A Hybrid Approach for Minimum Protection Capacity
—The problem of designing high capacity and high bit rate IP-over-WDM networks, which can provide uninterrupted service in the presence of network equipment failures, continues t...
Muhammad S. Javed, Krishnaiyan Thulasiraman, Guoli...