With the widening performance gap between processors and main memory, efficient memory accessing behavior is necessary for good program performance. Loop partition is an effective...
This paper introduces the notion of a Flexible Instruction Processor (FIP) for systematic customisation of instruction processor design and implementation. The features of our app...
In this paper we investigate some properties and algorithms related to a text sparsification technique based on the identification of local maxima in the given string. As the numb...
Pierluigi Crescenzi, Alberto Del Lungo, Roberto Gr...
We study variants of regular infinite games where the strict alternation of moves between the two players is subject to modifications. The second player may postpone a move for a f...
This paper proposes a combination of circuit and architectural techniques to maximize leakage power reduction in embedded processor on-chip caches. It targets cache peripheral cir...
Houman Homayoun, Mohammad A. Makhzan, Alexander V....