Abstract. This article presents a new algorithm for spatial deinterlacing that could easily be integrated in a more complete deinterlacing system, typically a spatio-temporal motio...
Recent research results have seen the application of parallelizing techniques to high-level synthesis. In particular, the effect of speculative code transformations on mixed contr...
Roberto Cordone, Fabrizio Ferrandi, Marco D. Santa...
In recent years different authors have proposed the used of random-walk-based algorithms for varying tasks in the networking community. These proposals include searching, routing...
Customization of processor architectures through Instruction Set Extensions (ISEs) is an effective way to meet the growing performance demands of embedded applications. A high-qua...
Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, ...
Functional verification of microprocessors is one of the most complex and expensive tasks in the current system-on-chip design process. A significant bottleneck in the validatio...