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IPPS
1998
IEEE
15 years 11 months ago
Scheduling with Communication Delays and Data Routing in Message Passing Architectures
This work deals with the scheduling problem of a directed acyclic graph with interprocessor communication delays. The objective is to minimize the makespan, taking into account the...
Aziz Moukrim, Alain Quilliot
GD
1998
Springer
15 years 11 months ago
Improved Force-Directed Layouts
Abstract. Techniques for drawing graphs based on force-directed placement and virtual physical models have proven surprisingly successful in producing good layouts of undirected gr...
Emden R. Gansner, Stephen C. North
ICCAD
1994
IEEE
104views Hardware» more  ICCAD 1994»
15 years 11 months ago
Module selection and data format conversion for cost-optimal DSP synthesis
In high level synthesis each node of a synchronous dataflow graph (DFG) is scheduled to a specific time and allocated to a processor. In this paper we present new integer linear p...
Kazuhito Ito, Lori E. Lucke, Keshab K. Parhi
DAC
1993
ACM
15 years 11 months ago
Rotation Scheduling: A Loop Pipelining Algorithm
— We consider the resource-constrained scheduling of loops with interiteration dependencies. A loop is modeled as a data flow graph (DFG), where edges are labeled with the numbe...
Liang-Fang Chao, Andrea S. LaPaugh, Edwin Hsing-Me...
SC
1990
ACM
15 years 10 months ago
Loop distribution with arbitrary control flow
Loop distribution is an integral part of transforming a sequential program into a parallel one. It is used extensively in parallelization,vectorization, and memory management. For...
Ken Kennedy, Kathryn S. McKinley