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DAC
2005
ACM
16 years 6 months ago
Cache coherence support for non-shared bus architecture on heterogeneous MPSoCs
We propose two novel integration techniques -- bypass and bookkeeping -- in the memory controller to address the cache coherence compatibility issue of a non-shared bus heterogene...
Taeweon Suh, Daehyun Kim, Hsien-Hsin S. Lee
ICASSP
2009
IEEE
16 years 19 days ago
Covariate shift adaptation for semi-supervised speaker identification
In this paper, we propose a novel semi-supervised speaker identification method that can alleviate the influence of nonstationarity such as session dependent variation, the reco...
Makoto Yamada, Masashi Sugiyama, Tomoko Matsui
ICPP
2009
IEEE
16 years 17 days ago
Complexity Analysis and Performance Evaluation of Matrix Product on Multicore Architectures
The multicore revolution is underway, bringing new chips introducing more complex memory architectures. Classical algorithms must be revisited in order to take the hierarchical me...
Mathias Jacquelin, Loris Marchal, Yves Robert
ICRA
2008
IEEE
122views Robotics» more  ICRA 2008»
16 years 10 days ago
Duration prediction for proactive replanning
— Proactive replanning attempts to predict scheduling problems or opportunities and adapt to them throughout a schedule’s execution. By continuously predicting a task’s remai...
Brennan Sellner, Reid G. Simmons
GLOBECOM
2007
IEEE
16 years 7 days ago
Spectral Properties and Interpolation Error Analysis for Variable Sample Rate Conversion Systems
—The problem of variable sample rate conversion (SRC) has received much attention on account of its applications in software defined radios (SDRs) that must support a wide varie...
Andre Tkacenko