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FPL
2007
Springer
106views Hardware» more  FPL 2007»
16 years 17 days ago
RAMP Blue: A Message-Passing Manycore System in FPGAs
We are developing a set of reusable design blocks and several prototype systems for emulation of multi-core architectures in FPGAs. RAMP Blue is the first of these prototypes and...
Alex Krasnov, Andrew Schultz, John Wawrzynek, Greg...
DIGRA
2003
Springer
15 years 11 months ago
The Construction of Ludic Space
Most modern graphics-based computer games entertain the player in part by presenting him or her with a simulated space, an imaginary two- or threedimensional region whose visual a...
Ernest Adams
DANCE
2002
IEEE
15 years 11 months ago
A Secure PLAN
— Active Networks, being programmable, promise greater flexibility than current networks. Programmability, however, may introduce safety and security risks. This paper describes...
Michael W. Hicks, Angelos D. Keromytis, Jonathan M...
ISCA
1999
IEEE
96views Hardware» more  ISCA 1999»
15 years 10 months ago
PipeRench: A Coprocessor for Streaming multimedia Acceleration
Future computing workloads will emphasize an architecture's ability to perform relatively simple calculations on massive quantities of mixed-width data. This paper describes ...
Seth Copen Goldstein, Herman Schmit, Matthew Moe, ...
DAC
2009
ACM
15 years 10 months ago
RegPlace: a high quality open-source placement framework for structured ASICs
Structured ASICs have recently emerged as an exciting alternative to ASIC or FPGA design style as they provide a new trade-off between the high performance of ASIC design and low ...
Ashutosh Chakraborty, Anurag Kumar, David Z. Pan