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» The Underlying Logic of Hoare Logic
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ICCAD
2003
IEEE
175views Hardware» more  ICCAD 2003»
16 years 3 months ago
Path Delay Estimation using Power Supply Transient Signals: A Comparative Study using Fourier and Wavelet Analysis
Transient Signal Analysis (TSA) is a parametric device testing technique based on the analysis of dynamic (transient) current (iDDT) drawn by the core logic from the power supply ...
Abhishek Singh, Jitin Tharian, Jim Plusquellic
144
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DNA
2009
Springer
173views Bioinformatics» more  DNA 2009»
16 years 20 days ago
Time-Complexity of Multilayered DNA Strand Displacement Circuits
Recently we have shown how molecular logic circuits with many components arranged in multiple layers can be built using DNA strand displacement reactions. The potential application...
Georg Seelig, David Soloveichik
VMCAI
2004
Springer
15 years 11 months ago
Boolean Algebra of Shape Analysis Constraints
Shape analysis is a promising technique for statically verifying and extracting properties of programs that manipulate complex data structures. We introduce a new characterization...
Viktor Kuncak, Martin C. Rinard
EMSOFT
2001
Springer
15 years 10 months ago
Interface Theories for Component-Based Design
Abstract. We classify component-based models of computation into component models and interface models. A component model speci es for each component how the component behaves in a...
Luca de Alfaro, Thomas A. Henzinger
CAV
2004
Springer
151views Hardware» more  CAV 2004»
15 years 9 months ago
QB or Not QB: An Efficient Execution Verification Tool for Memory Orderings
We study the problem of formally verifying shared memory multiprocessor executions against memory consistency models--an important step during post-silicon verification of multipro...
Ganesh Gopalakrishnan, Yue Yang, Hemanthkumar Siva...