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» The Underlying Logic of Hoare Logic
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VLSID
2007
IEEE
210views VLSI» more  VLSID 2007»
16 years 6 months ago
Dynamically Optimizing FPGA Applications by Monitoring Temperature and Workloads
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
Phillip H. Jones, Young H. Cho, John W. Lockwood
FPL
2008
Springer
153views Hardware» more  FPL 2008»
15 years 8 months ago
Exploring FPGA network on chip implementations across various application and network loads
Abstract-The network on chip will become a future general purpose interconnect for FPGAs much like today's standard OPB or PLB bus architectures. However, performance characte...
Graham Schelle, Dirk Grunwald
AAAI
1993
15 years 7 months ago
On the Adequateness of the Connection Method
Roughly speaking, adequatness is the property of a theorem proving method to solve simpler problems faster than more difficult ones. Automated inferencing methods are often not ad...
Antje Beringer, Steffen Hölldobler
DEBS
2008
ACM
15 years 7 months ago
Availability models for underlay aware overlay networks
Availability of an overlay network is a necessary condition for event delivery in event based systems. The availability of the overlay links depends on the underlying physical net...
Madhu Kumar SD, Umesh Bellur
SOFSEM
2009
Springer
16 years 3 months ago
Expressiveness of Multiple Heads in CHR
Abstract. Constraint Handling Rules (CHR) is a general purpose, committedchoice declarative language which, differently from other similar languages, uses multi-headed (guarded) ru...
Cinzia Di Giusto, Maurizio Gabbrielli, Maria Chiar...