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» The Underlying Logic of Hoare Logic
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VLSID
1999
IEEE
122views VLSI» more  VLSID 1999»
15 years 10 months ago
Formal Verification of an ARM Processor
This paper presents a detailed description of the application of a formal verification methodology to an ARM processor. The processor, a hybrid between the ARM7 and the StrongARM ...
Vishnu A. Patankar, Alok Jain, Randal E. Bryant
ATS
1998
IEEE
114views Hardware» more  ATS 1998»
15 years 10 months ago
Design and Simulation of a RISC-Based 32-bit Embedded On-Board Computer
This paper presents the design and simulation method for developing a RISC-based 32-bit embedded on-board computer. Instead of the conventional breadboarded prototype, (1) we used...
Zhen Guo, He Li, Shuling Guo, Dongsheng Wang
ICCAD
1998
IEEE
98views Hardware» more  ICCAD 1998»
15 years 10 months ago
Determination of worst-case aggressor alignment for delay calculation
Increases in delay due to coupling can have a dramatic impact on IC performance for deep submicron technologies. To achieve maximum performance there is a need for analyzing logic...
Paul D. Gross, Ravishankar Arunachalam, Karthik Ra...
RSP
1998
IEEE
162views Control Systems» more  RSP 1998»
15 years 10 months ago
The STEP Standard as an Approach for Design and Prototyping
STEP is an ISO standard (ISO-10303) for the computerinterpretable representation and exchange of product data. Parts of STEP standardize conceptual structures and usage ofinformat...
Alain Plantec, Vincent Ribaud
ECSQARU
1997
Springer
15 years 10 months ago
Assumption-Based Modeling Using ABEL
Abstract. Today, different formalisms exist to solve reasoning problems under uncertainty. For most of the known formalisms, corresponding computer implementations are available. ...
Bernhard Anrig, Rolf Haenni, Jürg Kohlas, Nor...