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» The Underlying Logic of Hoare Logic
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ICWE
2005
Springer
15 years 12 months ago
The Role of Visual Tools in a Web Application Design and Verification Framework: A Visual Notation for LTL Formulae
As the Web becomes a platform for implementing complex B2C and B2B applications, there is a need to extend Web conceptual modeling to process-centric applications. In this context,...
Marco Brambilla, Alin Deutsch, Liying Sui, Victor ...
ICSOC
2004
Springer
15 years 11 months ago
Hybrid web service composition: business processes meet business rules
Over the last few years several process-based web service composition languages have emerged, such as BPEL4WS and BPML. These languages define the composition on the basis of a pr...
Anis Charfi, Mira Mezini
ISLPED
1999
ACM
131views Hardware» more  ISLPED 1999»
15 years 10 months ago
Challenges in clockgating for a low power ASIC methodology
Gating the clock is an important technique used in low power design to disable unused modules of a circuit. Gating can save power by both preventing unnecessary activiiy in the lo...
David Garrett, Mircea R. Stan, Alvar Dean
FDL
2004
IEEE
15 years 10 months ago
A Formal Verification Approach for IP-based Designs
This paper proposes a formal verification methodology which is smoothly integrated with component-based system-level design, using a divide and conquer approach. The methodology a...
Daniel Karlsson, Petru Eles, Zebo Peng
FPGA
2000
ACM
109views FPGA» more  FPGA 2000»
15 years 10 months ago
Heterogeneous technology mapping for FPGAs with dual-port embedded memory arrays
It has become clear that on-chip storage is an essential component of high-density FPGAs. These arrays were originally intended to implement storage, but recent work has shown tha...
Steven J. E. Wilton