— We propose a methodology for Boolean matching under permutations of inputs and outputs (PP-equivalence checking problem) — a key step in incremental logic design that identif...
: In this paper logical cells and algorithms are presented supporting the design of pseudo-exhaustively testable circuits. The approach is based on real hardware segmentation, inst...
Fuzzy answer set programming has been introduced as a framework that successfully combines the concepts of answer set programming and fuzzy logic. In this paper, we show how the fu...
Davy Van Nieuwenborgh, Martine De Cock, Dirk Verme...
Impossible futures equivalence is the semantic equivalence on labelled transition systems that identifies systems iff they have the same "AGEF" properties: temporal logic...
Abstract. In this paper we propose a novel technique for constructing timed automata from properties expressed in the logic MTL, under bounded-variability assumptions. We handle fu...