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» The Timely Computing Base Model and Architecture
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DAC
2002
ACM
16 years 7 months ago
A solenoidal basis method for efficient inductance extraction
The ability to compute the parasitic inductance of the interconnect is critical to the timing verification of modern VLSI circuits. A challenging aspect of inductance extraction i...
Hemant Mahawar, Vivek Sarin, Weiping Shi
DAC
2003
ACM
16 years 7 months ago
Random walks in a supply network
This paper presents a power grid analyzer based on a random walk technique. A linear-time algorithm is first demonstrated for DC analysis, and is then extended to perform transien...
Haifeng Qian, Sani R. Nassif, Sachin S. Sapatnekar
VLSID
2008
IEEE
133views VLSI» more  VLSID 2008»
16 years 7 months ago
Exhaustive Enumeration of Legal Custom Instructions for Extensible Processors
Today's customizable processors allow the designer to augment the base processor with custom accelerators. By choosing appropriate set of accelerators, designer can significa...
Nagaraju Pothineni, Anshul Kumar, Kolin Paul
VLSID
2002
IEEE
92views VLSI» more  VLSID 2002»
16 years 7 months ago
Electromigration Avoidance in Analog Circuits: Two Methodologies for Current-Driven Routing
Interconnect with an insufficient width may be subject to electromigration and eventually cause the failure of the circuit at any time during its lifetime. This problem has gotten...
Jens Lienig, Goeran Jerke, Thorsten Adler
VLSID
2001
IEEE
129views VLSI» more  VLSID 2001»
16 years 7 months ago
Power-aware Multimedia Systems using Run-time Prediction
The need for low-power multimedia processing is integral to portable and embedded devices such as cell phones, wireless terminals, multimedia handhelds and PDAs. The multimedia pr...
Pavan Kumar, Mani B. Srivastava