Sciweavers

4679 search results - page 476 / 936
» The Timely Computing Base Model and Architecture
Sort
View
CODES
2003
IEEE
16 years 5 days ago
Design space exploration of a hardware-software co-designed GF(2m) galois field processor for forward error correction and crypt
This paper describes a hardware-software co-design approach for flexible programmable Galois Field Processing for applications which require operations over GF(2m ), such as RS an...
Wei Ming Lim, Mohammed Benaissa
FCCM
2002
IEEE
114views VLSI» more  FCCM 2002»
15 years 12 months ago
Implementing a Simple Continuous Speech Recognition System on an FPGA
Speech recognition is a computationally demanding task, particularly the stage which uses Viterbi decoding for converting pre-processed speech data into words or sub-word units. W...
Stephen J. Melnikoff, Steven F. Quigley, Martin J....
CVPR
2006
IEEE
16 years 9 months ago
Simultaneous Registration and Modeling of Deformable Shapes
Many natural objects vary the shapes as linear combinations of certain bases. The measurement of such deformable shapes is coupling of rigid similarity transformations between the...
Jing Xiao, Bogdan Georgescu, Xiang Zhou, Dorin Com...
DAC
2000
ACM
15 years 11 months ago
Fast power grid simulation
The decrease in feature size and added chip functionality in large sub-micron integrated circuits demand larger grids for power distribution. Since power grids are performance lim...
Sani R. Nassif, Joseph N. Kozhaya
DAC
1997
ACM
15 years 11 months ago
A C-Based RTL Design Verification Methodology for Complex Microprocessor
Cr, As the complexity of high-performance microprocessor increases, functional verification becomes more and more difficult and RTL simulation emerges as the bottleneck of the des...
Joon-Seo Yim, Yoon-Ho Hwang, Chang-Jae Park, Hoon ...