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» The Timely Computing Base Model and Architecture
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DAC
1997
ACM
15 years 10 months ago
Formal Verification of a Superscalar Execution Unit
Abstract. Many modern systems are designed as a set of interconnected reactive subsystems. The subsystem verification task is to verify an implementation of the subsystem against t...
Kyle L. Nelson, Alok Jain, Randal E. Bryant
DAC
1995
ACM
15 years 10 months ago
Register Allocation and Binding for Low Power
This paper describes a technique for calculating the switching activity of a set of registers shared by di erent data values. Based on the assumption that the joint pdf (probabili...
Jui-Ming Chang, Massoud Pedram
194
Voted
DAC
1995
ACM
15 years 10 months ago
Efficient Power Estimation for Highly Correlated Input Streams
- Power estimation in combinational modules is addressed from a probabilistic point of view. The zero-delay hypothesis is considered and under highly correlated input streams, the ...
Radu Marculescu, Diana Marculescu, Massoud Pedram
ICPP
1991
IEEE
15 years 10 months ago
Cache Coherence on a Slotted Ring
-- The Express Ring is a new architecture under investigation at the University of Southern California. Its main goal is to demonstrate that a slotted unidirectional ring with very...
Luiz André Barroso, Michel Dubois
IPPS
2005
IEEE
16 years 13 days ago
Production Scheduling by Reachability Analysis - A Case Study
— Schedule synthesis based on reachability analysis of timed automata has received attention in the last few years. The main strength of this approach is that the expressiveness ...
Gerd Behrmann, Ed Brinksma, Martijn Hendriks, Ange...