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OSDI
2004
ACM
16 years 7 months ago
Program-Counter-Based Pattern Classification in Buffer Caching
Program-counter-based (PC-based) prediction techniques have been shown to be highly effective and are widely used in computer architecture design. In this paper, we explore the op...
Chris Gniady, Ali Raza Butt, Y. Charlie Hu
VLSID
2006
IEEE
158views VLSI» more  VLSID 2006»
16 years 25 days ago
Programmable LDPC Decoder Based on the Bubble-Sort Algorithm
Low density parity check (LDPC) codes are one of the most powerful error correcting codes known. Recent research have pointed out their potential for a low cost, low latency hardw...
Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra
IEEEPACT
2005
IEEE
16 years 13 days ago
Exploiting Coarse-Grained Parallelism to Accelerate Protein Motif Finding with a Network Processor
While general-purpose processors have only recently employed chip multiprocessor (CMP) architectures, network processors (NPs) have used heterogeneous multi-core architectures sin...
Ben Wun, Jeremy Buhler, Patrick Crowley
CONCURRENCY
2002
116views more  CONCURRENCY 2002»
15 years 6 months ago
Parallel implementation of the fluid particle model for simulating complex fluids in the mesoscale
Dissipative particle dynamics (DPD) and its generalization - fluid particle model (FPM) - represent the "fluid particle" approach for simulating fluid-like behavior in t...
Krzysztof Boryczko, Witold Dzwinel, David A. Yuen
SIGMETRICS
2005
ACM
150views Hardware» more  SIGMETRICS 2005»
16 years 11 days ago
An analytical model for multi-tier internet services and its applications
- Since many Web applications employ a multi-tier architecture, in this paper, we focus on the problem of analytically modeling the behavior of such applications. We present a mode...
Bhuvan Urgaonkar, Giovanni Pacifici, Prashant J. S...