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» The Timely Computing Base Model and Architecture
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VLSID
2008
IEEE
122views VLSI» more  VLSID 2008»
16 years 7 months ago
A Module Checking Based Converter Synthesis Approach for SoCs
Protocol conversion involves the use of a converter to control communication between two or more protocols such that desired system-level specifications can be satisfied. We invest...
Roopak Sinha, Partha S. Roop, Samik Basu
ICDIM
2007
IEEE
16 years 1 months ago
Remote instrument control with CIMA Web services and Web 2.0 technology
—The Common Instrument Middleware Architecture (CIMA) model for Web services based monitoring of remote scientific instruments is being extended and enhanced to provide a capabil...
Douglas du Boulay, Clinton Chee, Kenneth Chiu, Ric...
IANDC
2007
107views more  IANDC 2007»
15 years 6 months ago
Task automata: Schedulability, decidability and undecidability
We present a model, task automata, for real time systems with non-uniformly recurring computation tasks. It is an extended version of timed automata with asynchronous processes th...
Elena Fersman, Pavel Krcál, Paul Pettersson...
197
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VTC
2006
IEEE
114views Communications» more  VTC 2006»
16 years 25 days ago
Channel Capacity of BLAST based on the Zero-Forcing criterion
In this paper, we present an asymptotical analysis of channel capacity of Bell labs layered space-time (BLAST) architectures based on a zero-forcing (ZF) criterion in the sense of...
Heunchul Lee, Inkyu Lee
RTCSA
2007
IEEE
16 years 1 months ago
A Real-Time Database Testbed and Performance Evaluation
A lot of real-time database (RTDB) research has been done to process transactions in a timely fashion using fresh data reflecting the current real world status. However, most exi...
Kyoung-Don Kang, Phillip H. Sin, Jisu Oh