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ASAP
2005
IEEE
169views Hardware» more  ASAP 2005»
16 years 13 days ago
Alleviating the Data Memory Bandwidth Bottleneck in Coarse-Grained Reconfigurable Arrays
It is widely known that parallel operation execution in multiprocessor systems generates a respective increase in memory accesses. Since the memory and bus subsystems provide a li...
Grigoris Dimitroulakos, Michalis D. Galanis, Costa...
AINA
2008
IEEE
16 years 1 months ago
A Concept of an Anonymous Direct P2P Distribution Overlay System
The paper introduces a peer-to-peer system called P2PRIV (peer-to-peer direct and anonymous distribution overlay). Basic novel features of P2PRIV are: (i) a peer-to-peer parallel ...
Igor Margasinski, Michal Pióro
DAC
1998
ACM
16 years 7 months ago
A Mixed Nodal-Mesh Formulation for Efficient Extraction and Passive Reduced-Order Modeling of 3D Interconnects
As VLSI circuit speeds have increased, reliable chip and system design can no longer be performed without accurate threedimensional interconnect models. In this paper, we describe...
Nuno Alexandre Marques, Mattan Kamon, Jacob White,...
PVM
2010
Springer
15 years 5 months ago
Toward Performance Models of MPI Implementations for Understanding Application Scaling Issues
Abstract. Designing and tuning parallel applications with MPI, particularly at large scale, requires understanding the performance implications of different choices of algorithms ...
Torsten Hoefler, William Gropp, Rajeev Thakur, Jes...
LAWEB
2003
IEEE
16 years 2 days ago
Application Modeling for the Semantic Web
In this article we present a method for the design and implementation of Web Applications for the Semantic Web. Based on the "Object Oriented Hypermedia Design Method" a...
Fernanda Lima, Daniel Schwabe