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ICDCSW
2002
IEEE
15 years 11 months ago
Quantifying Effect of Network Latency and Clock Drift on Time-Driven Key Sequencing
Time-driven Key Sequencing (TKS) is a key management technique that synchronizes the session key used by a set of communicating principals based on time of day. This relatively lo...
Geoffrey G. Xie, Cynthia E. Irvine, Timothy E. Lev...
FPL
2008
Springer
104views Hardware» more  FPL 2008»
15 years 8 months ago
A technique for minimizing power during FPGA placement
This paper considers the implementation of an annealing technique for dynamic power reduction in FPGAs. The proposed method comprises a power-aware objective function for placemen...
Kristofer Vorwerk, Madhu Raman, Julien Dunoyer, Ya...
OPODIS
2008
15 years 8 months ago
Evaluating a Data Removal Strategy for Grid Environments Using Colored Petri Nets
Abstract. In this paper we use colored Petri nets (CPNs) and the supporting CPN Tools for the modeling and performance analysis of grid architectures. The notation of Petri nets is...
Nikola Trcka, Wil M. P. van der Aalst, Carmen Brat...
IADIS
2004
15 years 8 months ago
A Middleware Service for Managing Time and Quality Dependent Context
Nowadays, wearable devices, such as mobile phones, PDAs, etc. gain widespread popularity for communication and data exchange. Consequently, several approaches investigate the prob...
Tasos Kontogiorgis, Dimitrios I. Fotiadis, Apostol...
APCSAC
2005
IEEE
16 years 9 days ago
Rule-Based Power-Balanced VLIW Instruction Scheduling with Uncertainty
Abstract. Power-balanced instruction scheduling for Very Long Instruction Word (VLIW) processors is an optimization problem which requires a good instruction-level power model for ...
Shu Xiao, Edmund Ming-Kit Lai, A. Benjamin Premkum...