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DAC
1994
ACM
15 years 10 months ago
Fitting Formal Methods into the Design Cycle
This tutorial introduces several methods of formal hardware veri cation that could potentially have a practical impact on the design process. The measure of success in integrating...
Kenneth L. McMillan
DAC
1994
ACM
15 years 10 months ago
Minimal Delay Interconnect Design Using Alphabetic Trees
Abstract - We propose a new algorithm for the performancedriven interconnect design problem, based on alphabetic trees. The interconnect topology is determined in a global manner a...
Ashok Vittal, Malgorzata Marek-Sadowska
ISVC
2010
Springer
15 years 4 months ago
Analysis of Time Domain Information for Footstep Recognition
This paper reports an experimental analysis of footsteps as a biometric. The focus here is on information extracted from the time domain of signals collected from an array of piezo...
Rubén Vera-Rodríguez, John S. D. Mas...
DAC
2007
ACM
15 years 10 months ago
Design for Verification in System-level Models and RTL
It has long been the practice to create models in C or C++ for architectural studies, software prototyping and RTL verification in the design of Systems-on-Chip (SoC). It is often...
Anmol Mathur, Venkat Krishnaswamy
RTSS
2000
IEEE
15 years 11 months ago
Performance Specifications and Metrics for Adaptive Real-Time Systems
While early research on real-time computing was concerned with guaranteeing avoidance of undesirable effects such as overload and deadline misses, adaptive real-time systems are d...
Chenyang Lu, John A. Stankovic, Tarek F. Abdelzahe...