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» The Timely Computing Base Model and Architecture
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MAM
2006
125views more  MAM 2006»
15 years 6 months ago
Stream computations organized for reconfigurable execution
Reconfigurable systems can offer the high spatial parallelism and fine-grained, bit-level resource control traditionally associated with hardware implementations, along with the f...
André DeHon, Yury Markovsky, Eylon Caspi, M...
JMLR
2006
80views more  JMLR 2006»
15 years 6 months ago
Using Machine Learning to Guide Architecture Simulation
An essential step in designing a new computer architecture is the careful examination of different design options. It is critical that computer architects have efficient means by ...
Greg Hamerly, Erez Perelman, Jeremy Lau, Brad Cald...
IPPS
2009
IEEE
16 years 1 months ago
Exploiting DMA to enable non-blocking execution in Decoupled Threaded Architecture
DTA (Decoupled Threaded Architecture) is designed to exploit fine/medium grained Thread Level Parallelism (TLP) by using a distributed hardware scheduling unit and relying on exi...
Roberto Giorgi, Zdravko Popovic, Nikola Puzovic
LCN
2008
IEEE
16 years 28 days ago
DiCAP: Distributed Packet Capturing architecture for high-speed network links
— IP traffic measurements form the basis of several network management tasks, such as accounting, planning, intrusion detection, and charging. High-speed network links challenge ...
Cristian Morariu, Burkhard Stiller
CONEXT
2010
ACM
15 years 4 months ago
SecondNet: a data center network virtualization architecture with bandwidth guarantees
In this paper, we propose virtual data center (VDC) as the unit of resource allocation for multiple tenants in the cloud. VDCs are more desirable than physical data centers becaus...
Chuanxiong Guo, Guohan Lu, Helen J. Wang, Shuang Y...