Sciweavers

4305 search results - page 184 / 861
» The Test of Time
Sort
View
ICCS
2007
Springer
16 years 21 days ago
Equivalent Semantic Translation from Parallel DEVS Models to Time Automata
Dynamic reconfigurable simulation based on Discrete Event System Specification (DEVS) requires efficient verification of simulation models. Traditional verification method of DEVS ...
Shoupeng Han, Kedi Huang
ADAEUROPE
2006
Springer
16 years 16 days ago
Interchangeable Scheduling Policies in Real-Time Middleware for Distribution
When a middleware layer is designed for providing semi-transparent distribution facilities to real-time applications, a trade-off must be made between the expressiveness and contro...
Juan López Campos, J. Javier Gutiérr...
ECRTS
1999
IEEE
15 years 11 months ago
Timed automaton models for simple programmable logic controllers
We give timed automaton models for a class of Programmable Logic Controller (PLC) applications, that are programmed in a simple fragment of the language Instruction Lists as defin...
Angelika Mader, Hanno Wupper
ISPAN
1997
IEEE
15 years 10 months ago
A method for estimating optimal unrolling times for nested loops
Loop unrolling is one of the most promising parallelization techniques, because the nature of programs causes most of the processing time to be spent in their loops. Unrolling not...
Akira Koseki, Hideaki Komatsu, Yoshiaki Fukazawa
ISLPED
1997
ACM
96views Hardware» more  ISLPED 1997»
15 years 10 months ago
Re-mapping for low power under tight timing constraints
In this paper1 we propose a novel approach to synthesis for low power under tight timing constraints. Starting from a mapped netlist, we apply a powerful generalized matching algo...
Patrick Vuillod, Luca Benini, Giovanni De Micheli