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DATE
2005
IEEE
116views Hardware» more  DATE 2005»
16 years 8 days ago
A Complete Network-On-Chip Emulation Framework
Current Systems-On-Chip (SoC) execute applications that demand extensive parallel processing. Networks-OnChip (NoC) provide a structured way of realizing interconnections on silic...
Nicolas Genko, David Atienza, Giovanni De Micheli,...
ICS
2005
Tsinghua U.
16 years 5 days ago
A NUCA substrate for flexible CMP cache sharing
We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...
Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhan...
171
Voted
LCPC
2005
Springer
16 years 4 days ago
Compiler Control Power Saving Scheme for Multi Core Processors
With the increase of transistors integrated onto a chip, multi core processor architectures have attracted much attention to achieve high effective performance, shorten developmen...
Jun Shirako, Naoto Oshiyama, Yasutaka Wada, Hiroak...
LSGRID
2004
Springer
16 years 19 hour ago
Mega Process Genetic Algorithm Using Grid MP
In this study, a new Genetic Algorithm (GA) using the Tabu · Local Search mechanism is proposed. The GA described in this paper is considered a Mega Process GA, which has an effe...
Yoshiko Hanada, Tomoyuki Hiroyasu, Mitsunori Miki,...
PPSN
2004
Springer
16 years 13 hour ago
Group Transport of an Object to a Target That Only Some Group Members May Sense
This paper addresses the cooperative transport of a heavy object, called prey, towards a sporadically changing target location by a group of robots. The study is focused on the sit...
Roderich Groß, Marco Dorigo