4213 search results - page 504 / 843 » The Tau Parallel Performance System |
181
click to vote
ICS
2011
Tsinghua U.
14 years 10 months ago
2011
Tsinghua U.
Efficient on-chip resource management is crucial for Chip Multiprocessors (CMP) to achieve high resource utilization and enforce system-level performance objectives. Existing mul...
180
click to vote
PPOPP
2010
ACM
16 years 4 months ago
2010
ACM
We present a performance model-driven framework for automated performance tuning (autotuning) of sparse matrix-vector multiply (SpMV) on systems accelerated by graphics processing...
212
click to vote
ICDCS
2008
IEEE
16 years 1 months ago
2008
IEEE
Wireless sensor networks (WSNs) deployed for missioncritical applications face the fundamental challenge of meeting stringent spatiotemporal performance requirements using nodes w...
148
click to vote
CLUSTER
2006
IEEE
16 years 26 days ago
2006
IEEE
The RandomAccess benchmark as defined by the High Performance Computing Challenge (HPCC) tests the speed at which a machine can update the elements of a table spread across globa...
186
click to vote
IPPS
2000
IEEE
15 years 11 months ago
2000
IEEE
The switch design for interconnection networks plays an important role in the overall performance of multiprocessors and computer networks. It is therefore crucial to study variou...