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JPDC
2006
146views more  JPDC 2006»
15 years 6 months ago
A semi-static approach to mapping dynamic iterative tasks onto heterogeneous computing systems
Minimization of the execution time of an iterative application in a heterogeneous parallel computing environment requires an appropriate mapping scheme for matching and scheduling...
Yu-Kwong Kwok, Anthony A. Maciejewski, Howard Jay ...
ISCA
1997
IEEE
113views Hardware» more  ISCA 1997»
15 years 11 months ago
Effects of Communication Latency, Overhead, and Bandwidth in a Cluster Architecture
This work provides a systematic study of the impact of communication performance on parallelapplications in a high performance network of workstations. We develop an experimental ...
Richard P. Martin, Amin Vahdat, David E. Culler, T...
ICS
2009
Tsinghua U.
16 years 1 months ago
High-performance CUDA kernel execution on FPGAs
In this work, we propose a new FPGA design flow that combines the CUDA programming model from Nvidia with the state of the art high-level synthesis tool AutoPilot from AutoESL, to...
Alexandros Papakonstantinou, Karthik Gururaj, John...
210
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ICDCS
2012
IEEE
13 years 9 months ago
eTransform: Transforming Enterprise Data Centers by Automated Consolidation
Abstract—Modern day enterprises have a large IT infrastructure comprising thousands of applications running on servers housed in tens of data centers geographically spread out. T...
Rahul Singh, Prashant J. Shenoy, K. K. Ramakrishna...
IEEEPACT
2003
IEEE
16 years 3 days ago
Using Software Logging to Support Multi-Version Buffering in Thread-Level Speculation
In Thread-Level Speculation (TLS), speculative tasks generate memory state that cannot simply be combined with the rest of the system because it is unsafe. One way to deal with th...
María Jesús Garzarán, Milos P...