4213 search results - page 475 / 843 » The Tau Parallel Performance System |
178
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HPCA
1998
IEEE
15 years 11 months ago
1998
IEEE
A key challenge in achieving high performance on software DSM systems is overcoming their relatively large communication latencies. In this paper, we consider two techniques which...
203
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HPCA
1996
IEEE
15 years 11 months ago
1996
IEEE
We have investigated the register file requirements of dynamically scheduled processors using register renaming and dispatch queues running the SPEC92 benchmarks. We looked at pro...
159
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CF
2004
ACM
16 years 8 days ago
2004
ACM
This presentation urges for creating more awareness of the impact of configware engineering onto embedded system development and examines the requirements of overdue CSE curricula...
187
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
—The sustained push for performance, transistor count, and instruction level parallelism has reached a point where chip level power density issues are at the forefront of design ...
182
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CLUSTER
2008
IEEE
16 years 1 months ago
2008
IEEE
—The increasing performance and decreasing cost of processors and memory are causing system intelligence to move from the CPU to peripherals such as disk drives. Storage system d...