4213 search results - page 348 / 843 » The Tau Parallel Performance System |
174
Voted
SAINT
2005
IEEE
16 years 10 days ago
2005
IEEE
In this paper, an IP-SAN access trace method is proposed and its implementation is presented. IP-SAN and iSCSI are expected to remedy problems of Fibre Channel (FC)-based SAN. Bec...
231
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ECBS
1996
IEEE
15 years 11 months ago
1996
IEEE
In this paper, it is shown that, through the use of Model-Integrated Program Synthesis MIPS, parallel real-time implementations of image processing data ows can be synthesized fro...
154
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SIGGRAPH
1993
ACM
15 years 10 months ago
1993
ACM
A physically compact, low cost, high performance 3D graphics accelerator is presented. It supports shaded rendering of triangles and antialiased lines into a double-buffered 24-bi...
149
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CLUSTER
2009
IEEE
16 years 1 months ago
2009
IEEE
—Current leadership-class machines suffer from a significant imbalance between their computational power and their I/O bandwidth. While Moore’s law ensures that the computatio...
203
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IPPS
2006
IEEE
16 years 23 days ago
2006
IEEE
Step caches are caches in which data entered to an cache array is kept valid only until the end of ongoing step of execution. Together with an advanced pipelined multithreaded arc...