4213 search results - page 140 / 843 » The Tau Parallel Performance System |
149
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JAL
2008
15 years 6 months ago
2008
Abstract. In the last few years, the microprocessors technologies have been definitely moving to multi-core architectures, in order to improve performances as well as reduce power ...
159
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ICS
2009
Tsinghua U.
16 years 1 months ago
2009
Tsinghua U.
Iterative stencil loops (ISLs) are used in many applications and tiling is a well-known technique to localize their computation. When ISLs are tiled across a parallel architecture...
144
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ICARCV
2008
IEEE
16 years 23 days ago
2008
IEEE
—This paper presents the controller synthesis for a fine actuation system of a 3-DOF micro parallel positioning platform. The platform is composed of a dual stage servo system fo...
186
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HPCA
2011
IEEE
14 years 10 months ago
2011
IEEE
As the web becomes the platform of choice for execution of more complex applications, a growing portion of computation is handed off by developers to the client side to reduce net...
165
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HPCN
1998
Springer
15 years 10 months ago
1998
Springer
The execution of an application on a high performance system requires parameters concerning the problem in hand, and those that determine the system mapping, to be specified by a ...