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ARITH
2003
IEEE
16 years 5 days ago
Multiple-Precision Fixed-Point Vector Multiply-Accumulator Using Shared Segmentation
This paper presents a 64-bit fixed-point vector multiply-accumulator (MAC) architecture capable of supporting multiple precisions. The vector MAC can perform one 64x64, two 32x32...
Dimitri Tan, Albert Danysh, Michael J. Liebelt
CODES
2003
IEEE
16 years 5 days ago
A low-cost memory architecture with NAND XIP for mobile embedded systems
NAND flash memory has become an indispensable component in mobile embedded systems because of its versatile features such as non-volatility, solid-state reliability, low cost and ...
Chanik Park, Jaeyu Seo, Sunghwan Bae, Hyojun Kim, ...
COOPIS
2003
IEEE
16 years 5 days ago
Re-factoring Middleware Systems: A Case Study
Abstract. Aspect oriented programming brings us new design perspectives since it permits the superimpositions of multiple abstraction models on top of one another. It is a very pow...
Charles Zhang, Hans-Arno Jacobsen
DATE
2003
IEEE
104views Hardware» more  DATE 2003»
16 years 5 days ago
Efficient Field Processing Cores in an Innovative Protocol Processor System-on-Chip
We present an innovative protocol processor component that combines wire-speed processing for low-level, and best effort processing for higher-level protocols. The component is a ...
George Lykakis, N. Mouratidis, Kyriakos Vlachos, N...
DATE
2003
IEEE
131views Hardware» more  DATE 2003»
16 years 5 days ago
High Speed and Highly Testable Parallel Two-Rail Code Checker
In this article we propose a high speed and highly testable parallel two-rail code checker, which features a compact structure and is Totally-Self-Checking or Strongly Code-Disjoi...
Martin Omaña, Daniele Rossi, Cecilia Metra
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