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CODES
2007
IEEE
16 years 1 months ago
Compile-time decided instruction cache locking using worst-case execution paths
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...
Heiko Falk, Sascha Plazar, Henrik Theiling
COMSWARE
2007
IEEE
16 years 1 months ago
On Optimal Performance in Mobile Ad hoc Networks
In this paper we are concerned with finding the maximum throughput that a mobile ad hoc network can support. Even when nodes are stationary, the problem of determining the capaci...
Tapas K. Patra, Joy Kuri, Pavan Nuggehalli
DATE
2007
IEEE
95views Hardware» more  DATE 2007»
16 years 1 months ago
Memory bank aware dynamic loop scheduling
In a parallel system with multiple CPUs, one of the key problems is to assign loop iterations to processors. This problem, known as the loop scheduling problem, has been studied i...
Mahmut T. Kandemir, Taylan Yemliha, Seung Woo Son,...
DDECS
2007
IEEE
201views Hardware» more  DDECS 2007»
16 years 1 months ago
Built in Defect Prognosis for Embedded Memories
: As scan compression replaces the traditional scan it is important to understand how it works with power. DFT MAX represents one of the two primary scan compression solutions used...
Prashant Dubey, Akhil Garg, Sravan Kumar Bhaskaran...
DSN
2007
IEEE
16 years 1 months ago
Electing an Eventual Leader in an Asynchronous Shared Memory System
This paper considers the problem of electing an eventual leader in an asynchronous shared memory system. While this problem has received a lot of attention in messagepassing syste...
Antonio Fernández, Ernesto Jiménez, ...
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