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ICS
2009
Tsinghua U.
16 years 1 months ago
Performance modeling and automatic ghost zone optimization for iterative stencil loops on GPUs
Iterative stencil loops (ISLs) are used in many applications and tiling is a well-known technique to localize their computation. When ISLs are tiled across a parallel architecture...
Jiayuan Meng, Kevin Skadron
ICS
2009
Tsinghua U.
16 years 1 months ago
High-performance CUDA kernel execution on FPGAs
In this work, we propose a new FPGA design flow that combines the CUDA programming model from Nvidia with the state of the art high-level synthesis tool AutoPilot from AutoESL, to...
Alexandros Papakonstantinou, Karthik Gururaj, John...
STACS
2009
Springer
16 years 1 months ago
Strong Completeness of Coalgebraic Modal Logics
ABSTRACT. Canonical models are of central importance in modal logic, in particular as they witness strong completeness and hence compactness. While the canonical model construction...
Lutz Schröder, Dirk Pattinson
CSE
2009
IEEE
16 years 1 months ago
Using Discovery and Monitoring Services to Support Context-Aware Remote Assisted Living Applications
Ubiquitous and pervasive applications are aware of the context of the used resources. This class of application can benefit from mechanisms to discover resources (devices and sens...
André Luiz B. Rodrigues, Izabela C. Gomes, ...
DSD
2009
IEEE
84views Hardware» more  DSD 2009»
16 years 1 months ago
Temperature- and Cost-Aware Design of 3D Multiprocessor Architectures
— 3D stacked architectures provide significant benefits in performance, footprint and yield. However, vertical stacking increases the thermal resistances, and exacerbates tempe...
Ayse Kivilcim Coskun, Andrew B. Kahng, Tajana Simu...
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