Iterative stencil loops (ISLs) are used in many applications and tiling is a well-known technique to localize their computation. When ISLs are tiled across a parallel architecture...
In this work, we propose a new FPGA design flow that combines the CUDA programming model from Nvidia with the state of the art high-level synthesis tool AutoPilot from AutoESL, to...
ABSTRACT. Canonical models are of central importance in modal logic, in particular as they witness strong completeness and hence compactness. While the canonical model construction...
Ubiquitous and pervasive applications are aware of the context of the used resources. This class of application can benefit from mechanisms to discover resources (devices and sens...
— 3D stacked architectures provide significant benefits in performance, footprint and yield. However, vertical stacking increases the thermal resistances, and exacerbates tempe...
Ayse Kivilcim Coskun, Andrew B. Kahng, Tajana Simu...