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ICCAD
1999
IEEE
89views Hardware» more  ICCAD 1999»
15 years 10 months ago
A bipartition-codec architecture to reduce power in pipelined circuits
This paper proposes a new bipatition-codec architecture that may reduce power consumption of pipelined circuits. We treat each output value of a pipelined circuit as one state of ...
Shanq-Jang Ruan, Rung-Ji Shang, Feipei Lai, Shyh-J...
ISLPED
1997
ACM
83views Hardware» more  ISLPED 1997»
15 years 10 months ago
A symbolic algorithm for low-power sequential synthesis
We present an algorithm that restructures the state transition graph STG of a sequential circuit so as to reduce power dissipation. The STG is modi ed without changing the behav...
Balakrishna Kumthekar, In-Ho Moon, Fabio Somenzi
AMAST
2004
Springer
15 years 10 months ago
Linear Temporal Logic and Z Refinement
Since Z, being a state-based language, describes a system in terms of its state and potential state changes, it is natural to want to describe properties of a specified system also...
John Derrick, Graeme Smith
JMLR
2006
190views more  JMLR 2006»
15 years 6 months ago
Causal Graph Based Decomposition of Factored MDPs
We present Variable Influence Structure Analysis, or VISA, an algorithm that performs hierarchical decomposition of factored Markov decision processes. VISA uses a dynamic Bayesia...
Anders Jonsson, Andrew G. Barto
IIE
2007
63views more  IIE 2007»
15 years 6 months ago
Investigation of Q-Learning in the Context of a Virtual Learning Environment
We investigate the possibility to apply a known machine learning algorithm of Q-learning in the domain of a Virtual Learning Environment (VLE). It is important in this problem doma...
Dalia Baziukaite