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» The Size of Power Automata
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IJCNN
2000
IEEE
15 years 11 months ago
Regression Analysis for Rival Penalized Competitive Learning Binary Tree
The main aim of this paper is to develop a suitable regression analysis model for describing the relationship between the index efficiency and the parameters of the Rival Penaliz...
Xuequn Li, Irwin King
HIPC
1999
Springer
15 years 11 months ago
Microcaches
We describe a radically new cache architecture and demonstrate that it offers a huge reduction in cache cost, size and power consumption whilst maintaining performance on a wide ra...
David May, Dan Page, James Irwin, Henk L. Muller
SCP
2008
91views more  SCP 2008»
15 years 6 months ago
Stable, flexible, peephole pretty-printing
Programmers working on large software systems are faced with an extremely complex, information-rich environment. To help navigate through this, modern development environments all...
Stoney Jackson, Premkumar T. Devanbu, Kwan-Liu Ma
CVPR
2007
IEEE
16 years 8 months ago
Robust Local Features and their Application in Self-Calibration and Object Recognition on Embedded Systems
In recent years many powerful Computer Vision algorithms have been invented, making automatic or semiautomatic solutions to many popular vision tasks, such as visual object recogn...
Clemens Arth, Christian Leistner, Horst Bischof
DAC
2004
ACM
16 years 7 months ago
Multi-profile based code compression
Code compression has been shown to be an effective technique to reduce code size in memory constrained embedded systems. It has also been used as a way to increase cache hit ratio...
Eduardo Wanderley Netto, Rodolfo Azevedo, Paulo Ce...