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HPCA
2011
IEEE
14 years 10 months ago
Archipelago: A polymorphic cache design for enabling robust near-threshold operation
Extreme technology integration in the sub-micron regime comes with a rapid rise in heat dissipation and power density for modern processors. Dynamic voltage scaling is a widely us...
Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott ...
CP
2005
Springer
16 years 4 days ago
2-Way vs. d-Way Branching for CSP
Abstract. Most CSP algorithms are based on refinements and extensions of backtracking, and employ one of two simple “branching schemes”: 2-way branching or d-way branching, fo...
Joey Hwang, David G. Mitchell
ICCAD
1995
IEEE
134views Hardware» more  ICCAD 1995»
15 years 10 months ago
A delay model for logic synthesis of continuously-sized networks
ng certain electrical noise and power constraints.Abstract: We present a new delay model for use in logic synthesis. A traditional model treats the area of a library cell as consta...
Joel Grodstein, Eric Lehman, Heather Harkness, Bil...
CASES
2005
ACM
15 years 8 months ago
A post-compilation register reassignment technique for improving hamming distance code compression
Code compression is a field where compression ratios between compiler-generated code and subsequent compressed code are highly dependent on decisions made at compile time. Most op...
Montserrat Ros, Peter Sutton
TJS
2008
105views more  TJS 2008»
15 years 6 months ago
Using a relational database for scalable XML search
XML is a flexible and powerful tool that enables information and security sharing in heterogeneous environments. Scalable technologies are needed to effectively manage the growing...
Rebecca Cathey, Steven M. Beitzel, Eric C. Jensen,...