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» The Size of Power Automata
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CODES
2005
IEEE
15 years 8 months ago
An efficient direct mapped instruction cache for application-specific embedded systems
Caches may consume half of a microprocessor’s total power and cache misses incur accessing off-chip memory, which is both time consuming and energy costly. Therefore, minimizing...
Chuanjun Zhang
RECOSOC
2007
118views Hardware» more  RECOSOC 2007»
15 years 8 months ago
A NoC-based Infrastructure to Enable Dynamic Self Reconfigurable Systems
Electronic equipments with higher performance, lower power consumption, and smaller size motivate the research for more efficient design methods. Platform-based design is a method...
Leandro Möller, Ismael Grehs, Ewerson Carvalh...
CIC
2006
156views Communications» more  CIC 2006»
15 years 8 months ago
The Impact of Clustering in Distributed Topology Control
Abstract-- Topology control is the problem of assigning power levels to the nodes of an ad hoc network so as to maintain a specified network topology while minimizing energy consum...
Liang Zhao, Errol L. Lloyd
TWC
2008
141views more  TWC 2008»
15 years 6 months ago
Bursty transmission and glue pouring: on wireless channels with overhead costs
Power efficiency is a capital issue in the study of mobile wireless nodes owing to constraints on their battery size and weight. In practice, especially for low-power nodes, it is ...
Pamela Youssef-Massaad, Lizhong Zheng, Muriel M&ea...
IPPS
1997
IEEE
15 years 10 months ago
Designing Efficient Distributed Algorithms Using Sampling Techniques
In this paper we show the power of sampling techniques in designing efficient distributed algorithms. In particular, we show that using sampling techniques, on some networks, sele...
Sanguthevar Rajasekaran, David S. L. Wei