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» The Size of Power Automata
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ICCD
2008
IEEE
109views Hardware» more  ICCD 2008»
16 years 3 months ago
Suitable cache organizations for a novel biomedical implant processor
— This paper evaluates various instruction- and data-cache organizations in terms of performance, power, energy and area on a suitably selected biomedical benchmark suite. The be...
Christos Strydis
ASAP
2006
IEEE
110views Hardware» more  ASAP 2006»
16 years 22 days ago
Loop Transformation Methodologies for Array-Oriented Memory Management
Abstract – The storage requirements in data-dominant signal processing systems, whose behavior is described by arraybased, loop-organized algorithmic specifications, have an imp...
Florin Balasa, Per Gunnar Kjeldsberg, Martin Palko...
ICCSA
2004
Springer
16 years 1 days ago
A Sequence-Focused Parallelisation of EMBOSS on a Cluster of Workstations
Abstract. A number of individual bioinformatics applications (particularly BLAST and other sequence searching methods) have recently been implemented over clusters of workstations ...
Karl Podesta, Martin Crane, Heather J. Ruskin
IWSOC
2003
IEEE
97views Hardware» more  IWSOC 2003»
15 years 12 months ago
Evaluating Template-Based Instruction Compression on Transport Triggered Architectures
In embedded systems, memory is one of the most expensive resources. Due to this, program code size has turned out to be one of the most critical design constraints. Code compressi...
Jari Heikkinen, Tommi Rantanen, Andrea G. M. Cilio...
MICRO
1997
IEEE
87views Hardware» more  MICRO 1997»
15 years 11 months ago
Improving Code Density Using Compression Techniques
We propose a method for compressing programs in embedded processors where instruction memory size dominates cost. A post-compilation analyzer examines a program and replaces commo...
Charles Lefurgy, Peter L. Bird, I-Cheng K. Chen, T...