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» The Size of Power Automata
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GLOBECOM
2007
IEEE
16 years 1 months ago
On Signal Processing Methods for MIMO Relay Architectures
— Relay networks have received considerable attention recently, especially when limited size and power resources impose constraints on the number of antennas within a wireless se...
Alireza Shahan Behbahani, Ricardo Merched, Ahmed M...
VLSID
2002
IEEE
114views VLSI» more  VLSID 2002»
15 years 11 months ago
Minimizing Energy Consumption for High-Performance Processing
Power consumption is becoming an increasingly important constraint in the design of microprocessors. This paper examines the use of multiple constrained processors running at lowe...
Eric F. Weglarz, Kewal K. Saluja, Mikko H. Lipasti
DATE
2004
IEEE
103views Hardware» more  DATE 2004»
15 years 10 months ago
A Novel Implementation of Tile-Based Address Mapping
Tile-based data layout has been applied to achieve various objectives such as minimizing cache conflicts and memory row switching activity. In some applications of tilebased mappi...
Sambuddhi Hettiaratchi, Peter Y. K. Cheung
ICCAD
2008
IEEE
116views Hardware» more  ICCAD 2008»
16 years 3 months ago
Optimization-based framework for simultaneous circuit-and-system design-space exploration: a high-speed link example
—Connecting system-level performance models with circuit information has been a long-standing problem in analog/mixed-signal front-ends, like radios and high-speed links. High-sp...
Ranko Sredojevic, Vladimir Stojanovic
ICC
2007
IEEE
16 years 1 months ago
Practical Limits of Multi-Tone Signaling Over High-Speed Backplane Electrical Links
— Application of Discrete Multi-tone (DMT) signaling to high-speed backplane interconnects requires major modifications to the well-known analysis methods applied to wireline com...
Amir Amirkhany, Ali-Azam Abbasfar, Vladimir Stojan...