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EURODAC
1994
IEEE
209views VHDL» more  EURODAC 1994»
15 years 11 months ago
MOS VLSI circuit simulation by hardware accelerator using semi-natural models
- The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...
Victor V. Denisenko
RTCSA
1995
IEEE
15 years 10 months ago
A timeliness-guaranteed kernel model-DREAM kernel-and implementation techniques
: An essential building-block for construction of future real-time computer systems (RTCS’s) is a timeliness-guaranteed operating system. The first co-author recently formulated ...
K. H. (Kane) Kim, Luiz F. Bacellar, Yuseok Kim, Ch...
EMNLP
2008
15 years 8 months ago
Modeling Annotators: A Generative Approach to Learning from Annotator Rationales
A human annotator can provide hints to a machine learner by highlighting contextual "rationales" for each of his or her annotations (Zaidan et al., 2007). How can one ex...
Omar Zaidan, Jason Eisner
IJCAI
2007
15 years 8 months ago
A Fully Connectionist Model Generator for Covered First-Order Logic Programs
We present a fully connectionist system for the learning of first-order logic programs and the generation of corresponding models: Given a program and a set of training examples,...
Sebastian Bader, Pascal Hitzler, Steffen Höll...
WORM
2003
15 years 8 months ago
Worm propagation modeling and analysis under dynamic quarantine defense
Due to the fast spreading nature and great damage of Internet worms, it is necessary to implement automatic mitigation, such as dynamic quarantine, on computer networks. Enlighten...
Cliff Changchun Zou, Weibo Gong, Donald F. Towsley