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147
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ICCD
2004
IEEE
16 years 3 months ago
2004
IEEE
Increasing system complexity and test cost demands new system-level solutions for mixed-signal systems. In this paper, we present a testability analysis and DfT insertion methodol...
187
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ICCAD
2007
IEEE
16 years 3 months ago
2007
IEEE
Abstract— Retiming, c-slow retiming and recycling are different transformations for the performance optimization of sequential circuits. For retiming and c-slow retiming, differe...
152
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ICCAD
2006
IEEE
16 years 3 months ago
2006
IEEE
We present a gridless method for solving the interior problem for a set of conductors in an homogeneous dielectric, at sufficiently high frequencies, valid for conductor lengths ...
157
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ICCAD
2001
IEEE
16 years 3 months ago
2001
IEEE
This paper attempts to determine the capabilities of existing Redundancy Addition and Removal (SRAR) techniques for logic optimization of sequential circuits. To this purpose, we ...
137
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ATS
2009
IEEE
16 years 1 months ago
2009
IEEE
SAT-based automatic test pattern generation has several advantages compared to conventional structural procedures, yet often yields too large test sets. We present a dynamic compa...