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IFIP
1993
Springer
15 years 10 months ago
Self-Timed Architecture of a Reduced Instruction Set Computer
An advanced Self-Timed Reduced Instruction Set Computer (ST-RISC) architecture is described. It is designed hierarchically, and is formally specified functionally at the various ...
Ilana David, Ran Ginosar, Michael Yoeli
ISLPED
1995
ACM
125views Hardware» more  ISLPED 1995»
15 years 10 months ago
Transforming set data types to power optimal data structures
In this paper we present a novel approach to model the search space for optimal set data types in network component realisations. The main objective is to arrive at power efficie...
Sven Wuytack, Francky Catthoor, Hugo De Man
FPL
2003
Springer
80views Hardware» more  FPL 2003»
15 years 11 months ago
High-Level Design Tools for FPGA-Based Combinatorial Accelerators
Analysis of different combinatorial search algorithms has shown that they have a set of distinctive features in common. The paper suggests a number of reusable blocks that support ...
Valery Sklyarov, Iouliia Skliarova, Pedro Almeida,...
IEEEINTERACT
2002
IEEE
15 years 11 months ago
On the Predictability of Program Behavior Using Different Input Data Sets
Smaller input data sets such as the test and the train input sets are commonly used in simulation to estimate the impact of architecture/micro-architecture features on the perform...
Wei-Chung Hsu, Howard Chen, Pen-Chung Yew, Dong-yu...
AAAI
1998
15 years 7 months ago
Logical Representation and Computation of Optimal Decisions in a Qualitative Setting
This paper describes a logical machineryfor computing decisions based on an ATMSprocedure, wherethe available knowledgeon the state of the world is describedbya possibilistic prop...
Didier Dubois, Daniel Le Berre, Henri Prade, R&eac...