Sciweavers

7742 search results - page 1276 / 1549
» The Robustness of Level Sets
Sort
View
ICCAD
1994
IEEE
95views Hardware» more  ICCAD 1994»
15 years 10 months ago
Provably correct high-level timing analysis without path sensitization
- This paper addresses the problem of true delay estimation during high level design. The existing delay estimation techniques either estimate the topological delay of the circuit ...
Subhrajit Bhattacharya, Sujit Dey, Franc Brglez
ICCAD
1994
IEEE
134views Hardware» more  ICCAD 1994»
15 years 10 months ago
Boolean constrained encoding: a new formulation and a case study
1 This paper provides a new, generalized approach to the problem of encoding information as vectors of binary digits. We furnish a formal definition for the Boolean constrained enc...
Ney Laert Vilar Calazans
ISCA
1993
IEEE
125views Hardware» more  ISCA 1993»
15 years 10 months ago
Evaluation of Mechanisms for Fine-Grained Parallel Programs in the J-Machine and the CM-5
er uses an abstract machine approach to compare the mechanisms of two parallel machines: the J-Machine and the CM-5. High-level parallel programs are translated by a single optimi...
Ellen Spertus, Seth Copen Goldstein, Klaus E. Scha...
DAC
1994
ACM
15 years 10 months ago
Automatic Verification of Pipelined Microprocessors
Abstract - We address the problem of automatically verifying large digital designs at the logic level, against high-level specifications. In this paper, we present a methodology wh...
Vishal Bhagwati, Srinivas Devadas
213
Voted
ALP
1992
Springer
15 years 10 months ago
Definitional Trees
Rewriting is a computational paradigm that specifies the actions, but not the control. We introduce a hierarchical structure repreat a high level of abstraction, a form of control....
Sergio Antoy
« Prev « First page 1276 / 1549 Last » Next »