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ICCAD
2006
IEEE
190views Hardware» more  ICCAD 2006»
16 years 4 months ago
Factor cuts
Enumeration of bounded size cuts is an important step in several logic synthesis algorithms such as technology mapping and re-writing. The standard algorithm does not scale beyond...
Satrajit Chatterjee, Alan Mishchenko, Robert K. Br...
ICCAD
2005
IEEE
127views Hardware» more  ICCAD 2005»
16 years 4 months ago
Flip-flop insertion with shifted-phase clocks for FPGA power reduction
— Although the LUT (look-up table) size of FPGAs has been optimized for general applications, complicated designs may contain a large number of cascaded LUTs between flip-flops...
Hyeonmin Lim, Kyungsoo Lee, Youngjin Cho, Naehyuck...
SOSP
2001
ACM
16 years 4 months ago
Resilient Overlay Networks
A Resilient Overlay Network (RON) is an architecture that allows distributed Internet applications to detect and recover from path outages and periods of degraded performance with...
David G. Andersen, Hari Balakrishnan, M. Frans Kaa...
SOSP
2003
ACM
16 years 4 months ago
User-level internet path diagnosis
Diagnosing faults in the Internet is arduous and time-consuming, in part because the network is composed of diverse components spread across many administrative domains. We consid...
Ratul Mahajan, Neil T. Spring, David Wetherall, Th...
PEPM
2010
ACM
16 years 4 months ago
PET: a partial evaluation-based test case generation tool for Java bytecode
PET is a prototype Partial Evaluation-based Test case generation tool for a subset of Java bytecode programs. It performs white-box test generation by means of two consecutive Par...
Elvira Albert, Miguel Gómez-Zamalloa, Germ&...
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