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HPCA
2005
IEEE
16 years 7 months ago
Predicting Inter-Thread Cache Contention on a Chip Multi-Processor Architecture
This paper studies the impact of L2 cache sharing on threads that simultaneously share the cache, on a Chip Multi-Processor (CMP) architecture. Cache sharing impacts threads non-u...
Dhruba Chandra, Fei Guo, Seongbeom Kim, Yan Solihi...
HPCA
2003
IEEE
16 years 7 months ago
Control Techniques to Eliminate Voltage Emergencies in High Performance Processors
Increasing focus on power dissipation issues in current microprocessors has led to a host of proposals for clock gating and other power-saving techniques. While generally effectiv...
Russ Joseph, David Brooks, Margaret Martonosi
CHI
2004
ACM
16 years 7 months ago
3Book: a scalable 3D virtual book
This paper describes the 3Book, a 3D interactive visualization of a codex book as a component for digital library and information-intensive applications. The 3Book is able to repr...
Stuart K. Card, Lichan Hong, Jock D. Mackinlay, Ed...
POPL
2008
ACM
16 years 7 months ago
Multiparty asynchronous session types
Communication is becoming one of the central elements in software development. As a potential typed foundation for structured communication-centred programming, session types have...
Kohei Honda, Nobuko Yoshida, Marco Carbone
POPL
2008
ACM
16 years 7 months ago
Imperative self-adjusting computation
Self-adjusting computation enables writing programs that can automatically and efficiently respond to changes to their data (e.g., inputs). The idea behind the approach is to stor...
Umut A. Acar, Amal Ahmed, Matthias Blume
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