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DSD
2003
IEEE
138views Hardware» more  DSD 2003»
15 years 12 months ago
A Two-step Genetic Algorithm for Mapping Task Graphs to a Network on Chip Architecture
Network on Chip (NoC) is a new paradigm for designing core based System on Chip which supports high degree of reusability and is scalable. In this paper we describe an efficient t...
Tang Lei, Shashi Kumar
SAC
2004
ACM
16 years 1 days ago
Towards a flexible, process-oriented IT architecture for an integrated healthcare network
Healthcare information systems play an important role in improving healthcare quality. As providing healthcare increasingly changes from isolated treatment episodes towards a cont...
Mario Beyer, Klaus Kuhn, Christian Meiler, Stefan ...
MONET
2010
125views more  MONET 2010»
15 years 5 months ago
GTPP: General Truncated Pyramid Peer-to-Peer Architecture over Structured DHT Networks
— Hierarchical Distributed Hash Table (DHT) architectures have been among the most interesting research topics since the birth of flat DHT architecture. However, most of the prev...
Zhonghong Ou, Erkki Harjula, Timo Koskela, Mika Yl...
DAC
2005
ACM
16 years 7 months ago
High performance encryption cores for 3G networks
This paper presents two novel and high performance hardware architectures, implemented in FPGA technology, for the KASUMI block cipher; this algorithm lies at the core of the conf...
René Cumplido, Tomás Balderas-Contre...
AINTEC
2007
Springer
16 years 24 days ago
Architecture of Satellite Internet for Asia-Wide Digital Communications
Abstract. This paper describes the network architecture of an Asiawide satellite Internet that considers the situations in developing regions. The design considerations for the arc...
Kotaro Kataoka, Achmad Husni Thamrin, Kenjiro Cho,...