Sciweavers

6271 search results - page 314 / 1255
» The RACE network architecture
Sort
View
GLVLSI
1996
IEEE
115views VLSI» more  GLVLSI 1996»
15 years 11 months ago
A VLSI Interconnection Network Router Using a D-CAM with Hidden Refresh
A VLSI implementation of a programmable router schemefor parallel interconnectionnetwork architectures is presented in this paper. The router executes routing
José G. Delgado-Frias, Jabulani Nyathi, Che...
PODC
2004
ACM
16 years 4 days ago
Compact routing on euclidian metrics
We consider the problem of designing a compact communication network that supports efficient routing in an Euclidean plane. Our network design and routing scheme achieves 1+ stret...
Ittai Abraham, Dahlia Malkhi
ICANN
2009
Springer
16 years 1 months ago
Connectionist Models for Formal Knowledge Adaptation
Abstract. Both symbolic knowledge representation systems and artificial neural networks play a significant role in Artificial Intelligence. A recent trend in the field aims at ...
Ilianna Kollia, Nikos Simou, Giorgos B. Stamou, An...
IFGIS
2009
Springer
16 years 1 months ago
Application of Self-Organizing Maps to the Maritime Environment
Self-Organizing Maps (SOMs), or Kohonen networks, are widely used neural network architecture. This paper starts with a brief overview of how SOMs can be used in different types of...
Victor Sousa Lobo
CSE
2009
IEEE
16 years 1 months ago
A Lightweight Architecture for Secure Two-Party Mobile Payment
The evolution of wireless networks and mobile devices has resulted in increased concerns about performance and security of mobile payment systems. In this paper we propose SA2pMP,...
Yunpu Zhu, Jacqueline E. Rice